Help Logs Database

Undernet  |  EFnet  |  Quakenet  |  Freenode  |  Ircnet  |  Dalnet
<i-nZ[w0rk]> hi. Does someone know what exactly does the x86 cpu when there is an overflow during a MUL/IMUL instruction ?
<i-nZ[w0rk]> it does set the Overflow flag, but how does it calc the result (shorten it?)
<Diseased_Punk> im having trouble compiling my visual basic program on this here BSD machine, oh noes help please ;(
<Sevalecan> you bastard lol
<Diseased_Punk> haha ;P
<Robert> Morrn.
<iojkl> hello
<Robert> Hi.
<gr00ber> PUSHA push ESP, right?
<gr00ber> is that ESP before or after the PUSHA?
<Robert> http://nasm.sourceforge.net/doc/html/nasmdocb.html#section-B.4.264
<Robert> (before)
<gr00ber> good
<gr00ber> thx
<gr00ber> it's PUSHAD automatically in bits32 mode, right?
<Robert> Yes.
<gr00ber> is the order well defined. It, according to the doc above, I should - after PUSHA - find ESP at [ESP+12] ?
<rwt> You could get cpu manual and read about pusha instruction; it's only few sentences.
<gr00ber> "add dword [ESP+12], 8" would work?
<gr00ber> rwt, I'm reading the text that Robert gave me
<gr00ber> I'm not to sure about this stuff, hence I ask
<wobster> gr00ber, yes. the order is granted
<gr00ber> splendid
<wobster> although I'm making an "irc idiot" out of me, check the intel instruction-set manual for the inner workings of pusha
<gr00ber> lol
<wobster> oh. err. what rwt said =)
<gr00ber> wobster, that's indeed what I'm reading, but it's hard **** for a stupid **** like me
<rwt> Intel manual part 2 has only few sentences with picture for pusha
<wobster> what?! .. the instructionset manual just uses register-transfer syntax to explain what it's doing .. or do you want to guess in what order the regs are pushed onto the stack?
<gr00ber> no guessing wanted
<gr00ber> found the section
<gr00ber> it appears that ESP is indeed at [ESP+12] after PUSHA
<wobster> good
<gr00ber> unless I'm counting impaired
<xark> Don't Intel manuals use that Pascal-ish psuedo code to show how opcodes work anymore?
<gr00ber> it looks Intel-ish
<gr00ber> hm
<gr00ber> if I call a C function from ASM
<gr00ber> am I expected to pop and pushed arguments too?
<Robert> Yes.
<Robert> Or drop them, using add esp,...
<xark> gr00ber: You have to "act" how your C compiler would act. See http://www.angelcode.com/dev/callconv/callconv.html
<mbuf> in the first example at http://www.acm.uiuc.edu/sigmil/RevEng/ch06.html, they say printf ("%s\n", test); what is this test?
<Robert> A pointer to a string.
<mbuf> Robert, but it isn't declared anywhere
<Robert> Hmm...
<Robert> Don't know why.
<wcstok> ;cause they screwed up
<wcstok> should've been longval
<gr00ber> Just to be sure: let's say I have a struct, like "struct XYZ {int a; int b; }" and I send this as an argument to an ASM function
<gr00ber> then b is at esp+4 and a at esp+8, right?
<wobster> no
<wobster> why should the members be reverse?
<gr00ber> because of how the struct is layed out in memory? But "b" get's higher mem address? OK...
<wobster> certainly the struct isn't reversed. no matter what you believe the "layout" is
<gr00ber> indeed
<gr00ber> just a brain fart
<wobster> neither in mem nor elsewhere
<wobster> yup. prolly ;)
<gr00ber> Damn, my code is right, just it didn't look right. Emberrased again.
<gr00ber> wobster,
<gr00ber> Hm. How would I access "a" and "b" if I send a pointer to the XYZ struct as argument?
<gr00ber> i.e. "void goASM(XYZ* zyx)"


Return to asm
or
Go to some related logs:

poker
canada
math

Copyright © 2005 www.irclogs.ws. All rights reserved. » disclaimer » contact